Dual device data correction (DDDC) memory modules may be capable of recovering from a single memory device failure of a rank by mapping out the failed device and utilizing redundancy found elsewhere in the rank. However, if a second device were to fail on the rank, the error correction code (ECC) protection may be weakened with a corresponding increase in the risk of silent data corruption (SDC). While cyclic redundancy check (CRC) codes may be used to reduce the chance of SDC (or for other purposes such as distinguishing between channel and dynamic random access memory storage errors to enable an effective repair policy), their use may also be associated with performance degradation.